Integrated circuits typically have a protection device, which is placed in between an input or output (I/O) pad and its corresponding circuitry. The protection device prevents the circuitry from being damaged when a high voltage is placed on the I/O pad, such as during an electrostatic discharge (ESD). Protection devices are particularly important in MOS integrated circuits, because the breakdown voltage of a typical MOS transistor with a 15 nanometer gate oxide is approximately 15 volts. Therefore, electrostatic discharges, which may create voltages in excess of 1000 volts at an I/O pad, will damage MOS transistors if they are left unprotected. The protection device, however, shields the internal MOS circuitry from these excessive voltages, and thus protects the integrated circuit.
The semiconductor industry's continuing demand for integrated circuits with higher device densities and improved performance, however, requires that new processing techniques be used to fabricate them. For example, in order to achieve higher device densities new isolation schemes, such as trench isolation are required to fabricate advanced integrated circuits. In addition, high performance integrated circuits also require new metallization schemes, such as silicidation. Many of these new fabrication techniques, however, are either incompatible with existing protection devices or they degrade the performance of these devices. For example, it is known that the ESD performance of either a thin or a thick gate oxide ESD transistor is degraded when their source and drain regions are clad with a silicide layer. Therefore, an additional masking step is required to fabricate these devices, such that the source and drain regions of these devices are not entirely clad by a silicide layer. Accordingly a need exists for a protection device, which is compatible with high density integrated circuit fabrication techniques, such as trench isolation and silicide formation.